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Webinar Replay

High-Performance Communications, Delivered

Fill out the form to learn about our next-gen SerDes test vehicle for high-performance systems: how we achieved first-spin fabrication success, a novel approach to managing design teams and an overview of PAM4 technology.

Webinar Video:
Presented by Wild River Technology, Samtec and eSilicon; SemiWiki Intro:

  • (1:17) The challenges of high-performance communications, introduction by Dan Nenni, SemiWiki
  • (3:30) Designing a test board to deliver performance, the Apollo mission model, Al Neves, Wild River Technology
  • (9:40) Delivering the required connectivity, Matt Burns, Samtec
  • (18:55) Putting it all together with our SerDes, Tim Horel, eSilicon
  • (24:22) Q&A

New Joint White Paper:

Meeting the Demands of PAM4 Systems at 56Gbps and Beyond
Technology, a winning methodology and the desire to collaborate all matter 

Please complete the form to access our video and white paper. Free emails and competitor emails will not be accepted.

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eSilicon & Wild River Technology's advanced high-performance SerDes test system addresses the incredible signal integrity demands of 56/112G PAM4 operation. The test system design utilizes the upcoming IEEE P370 standard in association with compliance metrics 802.3bs, OIF CEI – 56G PAM4, and COBO to validate the required performance.